1. Field of the Invention
The present invention relates to a nitride semiconductor substrate for a nitride semiconductor suitable as a high speed and high breakdown-voltage electron device.
2. Description of the Related Art
Nitride semiconductors, such as gallium nitride (GaN), aluminum nitride (AlN), etc., have outstanding properties, such as high electron mobility, high heat resistance, etc., and therefore can suitably be applied to a high electron mobility transistor (HEMT: High Electron Mobility Transistor), a heterojunction field effect transistor (HFET: Heterojunction Field Effect Transistor), for example.
In particular, there is an increasing demand for improvement in various electrical properties in a normally-off type HEMT structure in which a nitride semiconductor is used. In order to cope with this demand, several technologies are known.
For example, Japanese Patent Application Publication No. 2001-196575 discloses a technology in which, in order to reduce a leak current component caused by conduction of the remaining carrier in a buffer layer of GaN and to raise a pinch off property of a transistor in a GaN field-effect transistor, an AlGaN layer is provided in the GaN buffer layer of a heterostructure in which the GaN buffer layer, a channel layer of GaN or a combination of InGaN and GaN, and an AlGaN layer are formed one by one on a sapphire substrate or a SiC substrate, and an AlN content in the AlGaN layer is smaller than an AM content in the AlGaN layer at the surface.
Further, Japanese Patent Application Publication No. 2008-010803 discloses a nitride semiconductor field-effect transistor technology in which, an AlxGa1-xN layer, a GaN layer, and a AlyGa1-yN layer are stacked in this order in the +c direction of crystal orientation for the purpose of obtaining enhancement type operation capable of controlling the threshold voltage, and a gate portion has a channel of a double heterostructure, where depletion takes place when x≦y.
Furthermore, as a field effect transistor which can control the current collapse, Japanese Patent Application Publication No. 2010-123899 discloses a HEMT structure in which a first nitride semiconductor layer consisting of a first nitride semiconductor and a second nitride semiconductor layer which is formed on the first nitride semiconductor layer and consists of a second nitride semiconductor having a larger band gap than the first nitride semiconductor are provided, and the first nitride semiconductor layer has an area whose penetration dislocation density increases in the stacking direction.
Incidentally, in recent years, there has been a need for improvement in the threshold voltage and improvement in the current collapse in a normally-off type heterojunction field effect transistor.